graph LR
subgraph "输入保护与滤波"
A["三相380VAC/240VDC输入"] --> B["MOV浪涌保护器"]
B --> C["EMI滤波器(Class B)"]
C --> D["三相整流桥"]
end
subgraph "PFC/高压DC-DC变换"
D --> E["PFC升压电感"]
E --> F["高压开关节点"]
subgraph G["高压MOSFET阵列"]
direction LR
H["VBP16R90S \n Q1(主开关)"]
I["VBP16R90S \n Q2(同步整流)"]
J["VBP16R90S \n Q3(辅助开关)"]
end
F --> H
F --> I
F --> J
H --> K["高压直流母线 \n 400-500VDC"]
I --> K
J --> K
end
subgraph "谐振变换与输出"
K --> L["LLC谐振腔 \n Cr, Lr, Lm"]
L --> M["高频变压器"]
M --> N["次级整流"]
N --> O["输出滤波"]
O --> P["48VDC输出"]
end
subgraph "保护与控制"
Q["RCD缓冲电路"] --> H
R["电流检测电路"] --> S["过流保护"]
T["电压反馈"] --> U["PFC/LLC控制器"]
U --> V["栅极驱动器"]
V --> H
V --> I
V --> J
end
style H fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
style I fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
中压总线转换级拓扑详图
graph TB
subgraph "48V转12V中间总线架构"
A["48VDC输入"] --> B["输入电容阵列"]
B --> C["同步Buck变换器"]
subgraph D["功率开关阵列"]
direction LR
E["VBGP1602 \n 上管Q1"]
F["VBGP1602 \n 下管Q2"]
G["VBGP1602 \n 并联增强"]
end
C --> E
C --> F
C --> G
E --> H["开关节点"]
F --> H
G --> H
H --> I["输出滤波电感"]
I --> J["输出电容阵列"]
J --> K["12VDC输出总线"]
end
subgraph "驱动与保护"
L["专用大电流驱动器"] --> E
L --> F
L --> G
M["TVS栅极箝位"] --> L
N["电流检测电阻"] --> O["过流比较器"]
O --> P["故障锁存"]
P --> Q["关断信号"]
Q --> L
end
subgraph "散热设计"
R["高齿比散热器"] --> E
R --> F
R --> G
S["强制气流"] --> R
T["温度传感器"] --> U["PWM控制器"]
U --> V["风扇驱动"]
V --> S
end
subgraph "负载分配"
K --> W["计算单元供电"]
K --> X["存储背板供电"]
K --> Y["风扇系统供电"]
K --> Z["辅助电路供电"]
end
style E fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
style F fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
负载点转换与智能管理拓扑详图
graph LR
subgraph "多相CPU/GPU供电"
A["12VDC输入"] --> B["多相Buck控制器"]
subgraph C["相位1-相位N"]
direction TB
D["VBGQA1301 \n 高侧开关"]
E["VBGQA1301 \n 低侧开关"]
end
B --> D
B --> E
D --> F["开关节点"]
E --> F
F --> G["输出滤波"]
G --> H["Vcore输出 \n 0.8-1.8V/200A"]
end
subgraph "内存供电"
I["12VDC输入"] --> J["单相Buck控制器"]
subgraph K["功率开关"]
L["VBGQA1301 \n 高侧"]
M["VBGQA1301 \n 低侧"]
end
J --> L
J --> M
L --> N["开关节点"]
M --> N
N --> O["输出滤波"]
O --> P["Vmem输出 \n 1.2V/50A"]
end
subgraph "热插拔与智能开关"
Q["12VDC输入"] --> R["热插拔控制器"]
subgraph S["智能开关阵列"]
T["VBGQA1301 \n 硬盘背板"]
U["VBGQA1301 \n 网络子卡"]
V["VBGQA1301 \n 扩展模块"]
end
R --> T
R --> U
R --> V
T --> W["存储负载"]
U --> X["网络负载"]
V --> Y["扩展负载"]
end
subgraph "PCB布局与散热"
Z["多层厚铜PCB \n 3oz铜箔"] --> D
Z --> E
Z --> L
Z --> M
AA["散热过孔阵列 \n 0.3mm/0.8mm间距"] --> D
AA --> E
BB["底部露铜焊接"] --> D
BB --> E
end
style D fill:#fff3e0,stroke:#ff9800,stroke-width:2px
style E fill:#fff3e0,stroke:#ff9800,stroke-width:2px
style T fill:#fff3e0,stroke:#ff9800,stroke-width:2px