In the past, when discussing the working principle of MOSFETs, such as their switching process, and even when talking about IGBTs several times, we often mentioned a term: drive oscillation.

Today, we will mainly talk about the gate-source oscillation of MOSFETs, which may sound familiar to you. Yes, it is related to the discussion in the previous article about adding a resistor to the gate of the MOSFET.

In practical applications of MOSFETs, gate-source oscillation can cause device failures and abnormal circuit malfunctions. In severe cases, it may result in three states: either completely on or completely off, or entering a high-resistance on-state, leading to severe heating and burnout.

So, how does gate-source oscillation in MOSFETs occur?

Let's use the "series resistor" mentioned last time to illustrate briefly:

By adding a series resistor in the drive circuit, when R < √(L/C), it is in the underdamped state, and oscillation will definitely occur.

The following figure illustrates this:

Regarding the damping ratio, it will be discussed in detail below.

However, there are several conditions for the oscillation circuit to generate oscillation, detailed as follows:

Feedback Circuit

a. Phase Condition

The feedback signal from the output to the input is in phase with the input signal at the oscillation frequency (positive feedback).

b. Amplitude Condition

When the circuit has positive feedback and provides gain to compensate for losses, oscillation will occur.

1. Surge Voltage between Drain and Source

2. During MOSFET turn-off, there is a possibility of ringing voltage between the drain and source, which may return to the gate. This creates gate voltage oscillation through the positive feedback loop of the gate-drain capacitance Cgd connected to the gate.

3. Source Inductance

Power MOSFETs have large transconductance gm and parasitic capacitance. Therefore, wires and other parasitic inductances (inductances between gate, source, and drain circuits and related interconnections) may form a positive feedback loop, leading to parasitic oscillation.

So, what are the hazards of gate-source oscillation? There are several aspects:

• Insufficient EMI margin

• Serious device failure due to oscillation during dynamic load switching

How to suppress or alleviate gate-source oscillation?

1. Adjust the damping ratio of the drive circuit, with the formula as follows:

The damping ratio of the drive circuit generally has four types:

• When the damping ratio ζ = 0, it is called no damping, the system oscillates infinitely, and does not converge.

• ζ < 1 is called underdamping: ζ approaches 1 from 0, and the convergence is faster. It means the system has overshoot and oscillation.

• ζ > 1 is called overdamping, which means the system does not overshoot.

• ζ = 1 is called critical damping, which means the system does not overshoot and returns to the equilibrium or stable state in the shortest time.

Note: The critical resistance value is 10Ω. The larger the parasitic inductance L, the larger the critical resistance value.

2. Properly increase the internal parasitic resistance of the MOSFET to reduce the device's maximum switching speed and improve the suppression of gate oscillation.

3. Properly increase the device threshold voltage to alleviate the direct conduction probability of the upper and lower arms in the half-bridge or full-bridge topology.

4. Consider reducing the PCB lead inductance, i.e., increasing the trace width or reducing the trace length.

Note: When the inductance cannot be reduced, an external small resistor can be added, which increases the resistance and weakens the driving current (as mentioned in the previous article, for more details, please refer to it).

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